diff options
| author | Johan Almbladh <johan.almbladh@anyfinetworks.com> | 2021-10-07 16:28:28 +0200 |
|---|---|---|
| committer | Daniel Borkmann <daniel@iogearbox.net> | 2021-10-07 23:51:29 +0200 |
| commit | bbf731b3f44d512efaec065435f3efd0cbdac68e (patch) | |
| tree | 712d0ee2ca472030ade53ea6f98fc6933678b416 /arch/mips/net | |
| parent | e5c15a363de6f87d5aff9a2674f77c49f70a9ca2 (diff) | |
| download | linux-bbf731b3f44d512efaec065435f3efd0cbdac68e.tar.bz2 | |
mips, bpf: Optimize loading of 64-bit constants
This patch shaves off a few instructions when loading sparse 64-bit
constants to register. The change is covered by additional tests in
lib/test_bpf.c.
Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20211007142828.634182-1-johan.almbladh@anyfinetworks.com
Diffstat (limited to 'arch/mips/net')
| -rw-r--r-- | arch/mips/net/bpf_jit_comp64.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/mips/net/bpf_jit_comp64.c b/arch/mips/net/bpf_jit_comp64.c index 1f1f7b87f213..815ade724227 100644 --- a/arch/mips/net/bpf_jit_comp64.c +++ b/arch/mips/net/bpf_jit_comp64.c @@ -131,19 +131,25 @@ static void emit_mov_i64(struct jit_context *ctx, u8 dst, u64 imm64) emit(ctx, ori, dst, dst, (u16)imm64 & 0xffff); } else { u8 acc = MIPS_R_ZERO; + int shift = 0; int k; for (k = 0; k < 4; k++) { u16 half = imm64 >> (48 - 16 * k); if (acc == dst) - emit(ctx, dsll, dst, dst, 16); + shift += 16; if (half) { + if (shift) + emit(ctx, dsll_safe, dst, dst, shift); emit(ctx, ori, dst, acc, half); acc = dst; + shift = 0; } } + if (shift) + emit(ctx, dsll_safe, dst, dst, shift); } clobber_reg(ctx, dst); } |