diff options
| author | Christoph Hellwig <hch@lst.de> | 2018-06-15 13:08:32 +0200 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2018-06-24 09:26:02 -0700 |
| commit | 7e4dbdc11261bd7aaa18051247d01429e0b7cd03 (patch) | |
| tree | 6f6fdee653e23514ca13b7fb715adeca5d8bfe62 /arch/mips/mti-malta | |
| parent | 972dc3b79f421b5ae553b1073708cbd0d4da4a91 (diff) | |
| download | linux-7e4dbdc11261bd7aaa18051247d01429e0b7cd03.tar.bz2 | |
MIPS: remove CONFIG_DMA_COHERENT
We can just check for !CONFIG_DMA_NONCOHERENT instead and simplify things
a lot.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19530/
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org
Diffstat (limited to 'arch/mips/mti-malta')
| -rw-r--r-- | arch/mips/mti-malta/malta-setup.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c index 7b63914d2e58..4d5cdfeee3db 100644 --- a/arch/mips/mti-malta/malta-setup.c +++ b/arch/mips/mti-malta/malta-setup.c @@ -227,7 +227,7 @@ static void __init bonito_quirks_setup(void) } else BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; -#ifdef CONFIG_DMA_COHERENT +#ifndef CONFIG_DMA_NONCOHERENT if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; pr_info("Enabled Bonito CPU coherency\n"); @@ -279,7 +279,7 @@ void __init plat_mem_setup(void) */ enable_dma(4); -#ifdef CONFIG_DMA_COHERENT +#ifndef CONFIG_DMA_NONCOHERENT if (mips_revision_sconid != MIPS_REVISION_SCON_BONITO) panic("Hardware DMA cache coherency not supported"); #endif |