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| author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2019-07-31 08:46:16 +0000 |
|---|---|---|
| committer | Richard Weinberger <richard@nod.at> | 2019-08-13 14:34:42 +0200 |
| commit | 834de5c1aa768eb3d233d6544ea7153826c4b206 (patch) | |
| tree | f3910fe2e377e8b5371d0fdf63c8c32196d50ff4 /arch/mips/mm | |
| parent | d45331b00ddb179e291766617259261c112db872 (diff) | |
| download | linux-834de5c1aa768eb3d233d6544ea7153826c4b206.tar.bz2 | |
mtd: spi-nor: Fix the disabling of write protection at init
spi_nor_spansion_clear_sr_bp() depends on spansion_quad_enable().
While spansion_quad_enable() is selected as default when
initializing the flash parameters, the nor->quad_enable() method
can be overwritten later on when parsing BFPT.
Select the write protection disable mechanism at spi_nor_init() time,
when the nor->quad_enable() method is already known.
Fixes: 191f5c2ed4b6faba ("mtd: spi-nor: use 16-bit WRR command when QE is set on spansion flashes")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Diffstat (limited to 'arch/mips/mm')
0 files changed, 0 insertions, 0 deletions