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authorPaul Burton <paul.burton@mips.com>2019-10-01 21:53:40 +0000
committerPaul Burton <paul.burton@mips.com>2019-10-07 09:43:06 -0700
commit7f56b123548142fd48b2c6891977e8fda695a838 (patch)
treefb4f572a77a5784120c22d95939b30b16c426cd0 /arch/mips/loongson64
parente84957e6ae043bb83ad6ae7e949a1ce97b6bbfef (diff)
downloadlinux-7f56b123548142fd48b2c6891977e8fda695a838.tar.bz2
MIPS: barrier: Remove loongson_llsc_mb()
The loongson_llsc_mb() macro is no longer used - instead barriers are emitted as part of inline asm using the __SYNC() macro. Remove the now-defunct loongson_llsc_mb() macro. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: Huacai Chen <chenhc@lemote.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/loongson64')
-rw-r--r--arch/mips/loongson64/Platform2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/loongson64/Platform b/arch/mips/loongson64/Platform
index c1a4d4dc4665..28172500f95a 100644
--- a/arch/mips/loongson64/Platform
+++ b/arch/mips/loongson64/Platform
@@ -27,7 +27,7 @@ cflags-$(CONFIG_CPU_LOONGSON3) += -Wa,--trap
#
# Some versions of binutils, not currently mainline as of 2019/02/04, support
# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
-# to work around a CPU bug (see loongson_llsc_mb() in asm/barrier.h for a
+# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a
# description).
#
# We disable this in order to prevent the assembler meddling with the