diff options
| author | Deng-Cheng Zhu <dengcheng.zhu@gmail.com> | 2010-10-12 19:37:21 +0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-10-29 19:08:48 +0100 |
| commit | 7f788d2d53085815d474559cd51ef1f38b0a9bb8 (patch) | |
| tree | 32c2b6af15da818a02502a678225ff4de754b542 /arch/mips/kernel/unaligned.c | |
| parent | 6dbd972850c092e50e10bd14a3324e2abe88997a (diff) | |
| download | linux-7f788d2d53085815d474559cd51ef1f38b0a9bb8.tar.bz2 | |
MIPS: add support for software performance events
Software events are required as part of the measurable stuff by the
Linux performance counter subsystem. Here is the list of events added by
this patch:
PERF_COUNT_SW_PAGE_FAULTS
PERF_COUNT_SW_PAGE_FAULTS_MIN
PERF_COUNT_SW_PAGE_FAULTS_MAJ
PERF_COUNT_SW_ALIGNMENT_FAULTS
PERF_COUNT_SW_EMULATION_FAULTS
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Cc: a.p.zijlstra@chello.nl
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: jamie.iles@picochip.com
Acked-by: David Daney <ddaney@caviumnetworks.com>
Reviewed-by: Matt Fleming <matt@console-pimps.org>
Patchwork: https://patchwork.linux-mips.org/patch/1686/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/unaligned.c')
| -rw-r--r-- | arch/mips/kernel/unaligned.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index 33d5a5ce4a29..cfea1adfa153 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c @@ -78,6 +78,8 @@ #include <linux/smp.h> #include <linux/sched.h> #include <linux/debugfs.h> +#include <linux/perf_event.h> + #include <asm/asm.h> #include <asm/branch.h> #include <asm/byteorder.h> @@ -109,6 +111,9 @@ static void emulate_load_store_insn(struct pt_regs *regs, unsigned long value; unsigned int res; + perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, + 1, 0, regs, 0); + /* * This load never faults. */ @@ -511,6 +516,8 @@ asmlinkage void do_ade(struct pt_regs *regs) unsigned int __user *pc; mm_segment_t seg; + perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, + 1, 0, regs, regs->cp0_badvaddr); /* * Did we catch a fault trying to load an instruction? * Or are we running in MIPS16 mode? |