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authorPaul Burton <paul.burton@mips.com>2019-10-01 21:53:42 +0000
committerPaul Burton <paul.burton@mips.com>2019-10-07 09:43:09 -0700
commit12dbb04f2ac1fcbef0d6463abb3071ce8d8fe45f (patch)
tree09b1a1b5d7d35db3a5a20cec5a5cab111a6fca92 /arch/mips/kernel/genex.S
parentae4cd0b1a4756344cb99c0004d156b585cf9e907 (diff)
downloadlinux-12dbb04f2ac1fcbef0d6463abb3071ce8d8fe45f.tar.bz2
MIPS: genex: Add Loongson3 LL/SC workaround to ejtag_debug_handler
In ejtag_debug_handler we use LL & SC instructions to acquire & release an open-coded spinlock. For Loongson3 systems affected by LL/SC errata this requires that we insert a sync instruction prior to the LL in order to ensure correct behavior of the LL/SC loop. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: Huacai Chen <chenhc@lemote.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/kernel/genex.S')
-rw-r--r--arch/mips/kernel/genex.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index d586cdac9605..637048ec2acb 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -18,6 +18,7 @@
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
+#include <asm/sync.h>
#include <asm/war.h>
#include <asm/thread_info.h>
@@ -353,6 +354,7 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp)
#ifdef CONFIG_SMP
1: PTR_LA k0, ejtag_debug_buffer_spinlock
+ __SYNC(full, loongson3_war)
ll k0, 0(k0)
bnez k0, 1b
PTR_LA k0, ejtag_debug_buffer_spinlock