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| author | Huacai Chen <chenhc@lemote.com> | 2020-08-24 15:44:03 +0800 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-22 13:07:22 +0200 |
| commit | 01ce6d4d2c8157b076425e3dd8319948652583c5 (patch) | |
| tree | fb11df3825b051f1cfcb1aecf681b7b5fffc28b9 /arch/mips/include | |
| parent | b959b97860d0fee8c8f6a3e641d3c2ad76eab6be (diff) | |
| download | linux-01ce6d4d2c8157b076425e3dd8319948652583c5.tar.bz2 | |
MIPS: Loongson-3: Fix fp register access if MSA enabled
If MSA is enabled, FPU_REG_WIDTH is 128 rather than 64, then get_fpr64()
/set_fpr64() in the original unaligned instruction emulation code access
the wrong fp registers. This is because the current code doesn't specify
the correct index field, so fix it.
Fixes: f83e4f9896eff614d0f2547a ("MIPS: Loongson-3: Add some unaligned instructions emulation")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include')
0 files changed, 0 insertions, 0 deletions