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authorThomas Bogendoerfer <tbogendoerfer@suse.de>2019-02-19 16:57:16 +0100
committerPaul Burton <paul.burton@mips.com>2019-02-19 12:46:02 -0800
commita44d924c81d43ddffc985aca14aeeaf1abd6dd22 (patch)
treedc8defb7616ebf39551f10977666008d574cacc2 /arch/mips/include/asm/sn
parentdb0e7d4e42b0557caad5112b405da59c933bea24 (diff)
downloadlinux-a44d924c81d43ddffc985aca14aeeaf1abd6dd22.tar.bz2
MIPS: SGI-IP27: clean up bridge access and header files
Introduced bridge_read/bridge_write/bridge_set/bridge_clr for accessing bridge register and get rid of volatile declarations. Also removed all typedefs from arch/mips/include/asm/pci/bridge.h and cleaned up language in arch/mips/pci/ops-bridge.c Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/sn')
-rw-r--r--arch/mips/include/asm/sn/sn0/addrs.h5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/mips/include/asm/sn/sn0/addrs.h b/arch/mips/include/asm/sn/sn0/addrs.h
index 6b53070f400f..f13df84edfdd 100644
--- a/arch/mips/include/asm/sn/sn0/addrs.h
+++ b/arch/mips/include/asm/sn/sn0/addrs.h
@@ -134,11 +134,6 @@
#define CALIAS_BASE CAC_BASE
-
-
-#define BRIDGE_REG_PTR(_base, _off) ((volatile bridgereg_t *) \
- ((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
-
#define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid)))
/* Turn on sable logging for the processors whose bits are set. */