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author | Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> | 2014-03-04 13:34:43 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:22 +0100 |
commit | f36c4720fca325579faddc880d4e178e4ccbda88 (patch) | |
tree | 201608d0ba6b8b705ea20f9c64fc02364b402cdf /arch/mips/include/asm/cpu.h | |
parent | 4975b86add254e1c706c82cded06ca2911f90ae3 (diff) | |
download | linux-f36c4720fca325579faddc880d4e178e4ccbda88.tar.bz2 |
MIPS: Add support for the M5150 processor
The M5150 core is a 32-bit MIPS RISC which implements the
MIPS Architecture Release-5 in a 5-stage pipeline.
In addition, it includes the MIPS Architecture Virtualization Module
that enables virtualization of operating systems,
which provides a scalable, trusted, and secure execution environment.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6596/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
-rw-r--r-- | arch/mips/include/asm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 161113274bb8..64b4b69d26f4 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -298,7 +298,7 @@ enum cpu_type_enum { CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350, CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC, - CPU_M14KEC, CPU_INTERAPTIV, CPU_P5600, CPU_PROAPTIV, CPU_1074K, + CPU_M14KEC, CPU_INTERAPTIV, CPU_P5600, CPU_PROAPTIV, CPU_1074K, CPU_M5150, /* * MIPS64 class processors |