summaryrefslogtreecommitdiffstats
path: root/arch/mips/boot
diff options
context:
space:
mode:
authorPaul Cercueil <paul@crapouillou.net>2019-07-24 13:16:12 -0400
committerPaul Burton <paul.burton@mips.com>2019-08-08 15:31:12 -0700
commita68d3b052b57a223a6842883f6a2f71621d2e8cb (patch)
tree2d4e2960356fc894e93e84f0a1f07477102b1598 /arch/mips/boot
parent36aafdbd52881eda9073c4d03d65438a16b87a92 (diff)
downloadlinux-a68d3b052b57a223a6842883f6a2f71621d2e8cb.tar.bz2
MIPS: qi_lb60: Reduce system timer and clocksource to 750 kHz
The default clock (12 MHz) is too fast for the system timer, which fails to report time accurately. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
Diffstat (limited to 'arch/mips/boot')
-rw-r--r--arch/mips/boot/dts/ingenic/qi_lb60.dts7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts
index 76aaf8982554..01b8c917cb33 100644
--- a/arch/mips/boot/dts/ingenic/qi_lb60.dts
+++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts
@@ -2,6 +2,7 @@
/dts-v1/;
#include "jz4740.dtsi"
+#include <dt-bindings/clock/ingenic,tcu.h>
/ {
compatible = "qi,lb60", "ingenic,jz4740";
@@ -31,3 +32,9 @@
bias-disable;
};
};
+
+&tcu {
+ /* 750 kHz for the system timer and clocksource */
+ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
+ assigned-clock-rates = <750000>, <750000>;
+};