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authorJonas Gorski <jonas.gorski@gmail.com>2017-09-20 13:14:02 +0200
committerJames Hogan <jhogan@kernel.org>2017-11-07 18:33:17 +0000
commit243fa279a8eccd5b49e32ba7740f752be0d2aa5e (patch)
tree3c13ee708f45d06fb97aefd3a28f4ff5d0aa07d7 /arch/mips/bcm63xx
parentc5af3c2dd0760737f4fee9c414a7d647957ca767 (diff)
downloadlinux-243fa279a8eccd5b49e32ba7740f752be0d2aa5e.tar.bz2
MIPS: BCM63XX: provide periph clock as refclk for uart
Add a lookup as "refclk" to describe its function for the uarts. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Russell King <linux@armlinux.org.uk> Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17326/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: James Hogan <jhogan@kernel.org>
Diffstat (limited to 'arch/mips/bcm63xx')
-rw-r--r--arch/mips/bcm63xx/clk.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index f712c9558d57..d8dac1f9a65a 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -363,6 +363,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
static struct clk_lookup bcm3368_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -376,6 +378,8 @@ static struct clk_lookup bcm3368_clks[] = {
static struct clk_lookup bcm6328_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -387,6 +391,7 @@ static struct clk_lookup bcm6328_clks[] = {
static struct clk_lookup bcm6338_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -399,6 +404,7 @@ static struct clk_lookup bcm6338_clks[] = {
static struct clk_lookup bcm6345_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -411,6 +417,7 @@ static struct clk_lookup bcm6345_clks[] = {
static struct clk_lookup bcm6348_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -423,6 +430,8 @@ static struct clk_lookup bcm6348_clks[] = {
static struct clk_lookup bcm6358_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
@@ -436,6 +445,8 @@ static struct clk_lookup bcm6358_clks[] = {
static struct clk_lookup bcm6362_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
@@ -449,6 +460,8 @@ static struct clk_lookup bcm6362_clks[] = {
static struct clk_lookup bcm6368_clks[] = {
/* fixed rate clocks */
CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
/* gated clocks */
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),