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| author | Ralf Baechle <ralf@linux-mips.org> | 2006-11-07 09:58:30 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-06 16:53:20 +0000 |
| commit | 786d7cdd06581773ee7913560838d6f4487d2d9f (patch) | |
| tree | 857c09e60aa00c001ffacc9a7149d99dba050915 /arch/mips/au1000 | |
| parent | e0daad449c5195fa4552c60392eeee4e5c58d31c (diff) | |
| download | linux-786d7cdd06581773ee7913560838d6f4487d2d9f.tar.bz2 | |
[MIPS] Alchemy: Fix bunch of warnings
CC arch/mips/au1000/common/pci.o
arch/mips/au1000/common/pci.c:42: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:43: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:49: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:50: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c: In function ‘au1x_pci_setup’:
arch/mips/au1000/common/pci.c:82: warning: ISO C90 forbids mixed declarations and code
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/au1000')
| -rw-r--r-- | arch/mips/au1000/common/pci.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c index 9f8ce08e173b..6c25e6c09f78 100644 --- a/arch/mips/au1000/common/pci.c +++ b/arch/mips/au1000/common/pci.c @@ -76,13 +76,17 @@ static int __init au1x_pci_setup(void) } #ifdef CONFIG_DMA_NONCOHERENT - /* - * Set the NC bit in controller for Au1500 pre-AC silicon - */ - u32 prid = read_c0_prid(); - if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { - au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG); - printk("Non-coherent PCI accesses enabled\n"); + { + /* + * Set the NC bit in controller for Au1500 pre-AC silicon + */ + u32 prid = read_c0_prid(); + + if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { + au_writel((1 << 16) | au_readl(Au1500_PCI_CFG), + Au1500_PCI_CFG); + printk("Non-coherent PCI accesses enabled\n"); + } } #endif |