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authorChris Dearman <chris@mips.com>2007-09-19 00:58:24 +0100
committerRalf Baechle <ralf@linux-mips.org>2008-04-28 17:14:25 +0100
commit351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (patch)
treed9e9253bd30cf011d248ad3b63761a9a725e5cb0 /arch/mips/Kconfig.debug
parentbec5052743ec8ae4c5669918cf9b130bf15709a2 (diff)
downloadlinux-351336929ccf222ae38ff0cb7a8dd5fd5c6236a0.tar.bz2
[MIPS] Allow setting of the cache attribute at run time.
Slightly tacky, but there is a precedent in the sparc archirecture code. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig.debug')
-rw-r--r--arch/mips/Kconfig.debug10
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index fd7124c1b75a..f18cf92650e3 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -73,14 +73,4 @@ config RUNTIME_DEBUG
include/asm-mips/debug.h for debuging macros.
If unsure, say N.
-config MIPS_UNCACHED
- bool "Run uncached"
- depends on DEBUG_KERNEL && !SMP && !SGI_IP27
- help
- If you say Y here there kernel will disable all CPU caches. This will
- reduce the system's performance dramatically but can help finding
- otherwise hard to track bugs. It can also useful if you're doing
- hardware debugging with a logic analyzer and need to see all traffic
- on the bus.
-
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