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| author | Sean Anderson <sean.anderson@seco.com> | 2022-03-03 17:35:43 -0500 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2022-04-22 18:30:44 +0200 |
| commit | bc1ce713a0843ba14a1e00d5275ad42a8873a5ce (patch) | |
| tree | fc4c5200109eaddbba0267c60f5732677b936b03 /arch/microblaze | |
| parent | f643490e1bf941600f6105e4d27c49054fb6d562 (diff) | |
| download | linux-bc1ce713a0843ba14a1e00d5275ad42a8873a5ce.tar.bz2 | |
pwm: Add support for Xilinx AXI Timer
This adds PWM support for Xilinx LogiCORE IP AXI soft timers commonly
found on Xilinx FPGAs. At the moment clock control is very basic: we
just enable the clock during probe and pin the frequency. In the future,
someone could add support for disabling the clock when not in use.
Some common code has been specially demarcated. While currently only
used by the PWM driver, it is anticipated that it may be split off in
the future to be used by the timer driver as well.
This driver was written with reference to Xilinx DS764 for v1.03.a [1].
[1] https://www.xilinx.com/support/documentation/ip_documentation/axi_timer/v1_03_a/axi_timer_ds764.pdf
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'arch/microblaze')
| -rw-r--r-- | arch/microblaze/kernel/timer.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c index f8832cf49384..26c385582c3b 100644 --- a/arch/microblaze/kernel/timer.c +++ b/arch/microblaze/kernel/timer.c @@ -251,6 +251,10 @@ static int __init xilinx_timer_init(struct device_node *timer) u32 timer_num = 1; int ret; + /* If this property is present, the device is a PWM and not a timer */ + if (of_property_read_bool(timer, "#pwm-cells")) + return 0; + if (initialized) return -EINVAL; |