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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-07 21:08:40 +0900 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-07 21:08:40 +0900 |
| commit | 5cad3598ea0cdb817681f74518d3213583a04f7a (patch) | |
| tree | 792786bea205f6eef7274b65e1e1e63d21df511d /arch/microblaze/include/asm/page.h | |
| parent | 638c87a91666df1f16866badee862ce38bf31e4a (diff) | |
| parent | 94fda49a948a5999699359313a2f857f9d11ff19 (diff) | |
| download | linux-5cad3598ea0cdb817681f74518d3213583a04f7a.tar.bz2 | |
Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblaze
Pull microblaze arch updates from Michal Simek.
* 'next' of git://git.monstr.eu/linux-2.6-microblaze:
Revert "microblaze_mmu_v2: Update signal returning address"
microblaze: Added more support for PCI
microblaze: Prefer to use pr_XXX instead of printk(KERN_XX)
microblaze: Fix bug with passing command line
microblaze: Remove PAGE properties duplication
microblaze: Remove additional andi which has been already done
microblaze: Use predefined macro for ESR_DIZ
microblaze: Support 4k/16k/64k pages
microblaze: Do not used hardcoded value in exception handler
microblaze: Added fdt chosen capability for timer
microblaze: Add support for ioreadXX/iowriteXX_rep
microblaze: Improve failure handling for GPIO reset
microblaze: clinkage.h
Diffstat (limited to 'arch/microblaze/include/asm/page.h')
| -rw-r--r-- | arch/microblaze/include/asm/page.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h index 287c5485d286..85a5ae8e9bd0 100644 --- a/arch/microblaze/include/asm/page.h +++ b/arch/microblaze/include/asm/page.h @@ -23,12 +23,10 @@ #ifdef __KERNEL__ /* PAGE_SHIFT determines the page size */ -#if defined(CONFIG_MICROBLAZE_32K_PAGES) -#define PAGE_SHIFT 15 +#if defined(CONFIG_MICROBLAZE_64K_PAGES) +#define PAGE_SHIFT 16 #elif defined(CONFIG_MICROBLAZE_16K_PAGES) #define PAGE_SHIFT 14 -#elif defined(CONFIG_MICROBLAZE_8K_PAGES) -#define PAGE_SHIFT 13 #else #define PAGE_SHIFT 12 #endif @@ -37,6 +35,8 @@ #define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_KERNEL_BASE_ADDR)) +#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */ + #ifndef __ASSEMBLY__ /* MS be sure that SLAB allocates aligned objects */ @@ -71,7 +71,6 @@ extern unsigned int __page_offset; * The basic type of a PTE - 32 bit physical addressing. */ typedef unsigned long pte_basic_t; -#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */ #define PTE_FMT "%.8lx" #endif /* CONFIG_MMU */ |