diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-06-02 20:00:54 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-06-02 20:00:54 -0700 |
commit | b55a0ff8df92646696c858a8fea4dbf38509f202 (patch) | |
tree | 9b3fb1da94093e5147b1ef5bcd5277f9187c32cd /arch/m68k/include/asm | |
parent | a727eaf64ff084a50b983fc506810c7a576b7ce3 (diff) | |
parent | 83c6bdb827c9422fe6e02130d9546800143304c1 (diff) | |
download | linux-b55a0ff8df92646696c858a8fea4dbf38509f202.tar.bz2 |
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu into next
Pull m68knommu updates from Greg Ungerer:
"Nothing too big, just a handfull of small changes.
A couple of dragonball fixes, coldfire qspi cleanup and fixes, and
some coldfire gpio cleanup, fixes and extensions"
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
m68knommu: Implement gpio support for m54xx.
m68knommu: Make everything thats not exported, static.
m68knommu: setting the gpio data direction register to output doesn't dependent upon the value to output!
m68knommu: add to_irq function so we can map gpios to external interrupts.
m68knommu: qspi declutter.
m68knommu: Fix the 5249/525x qspi base address.
m68knommu: Add qspi clk for Coldfire SoCs without real clks.
m68k: fix a compiler warning when building for DragonBall
m68knommu: Fix mach_sched_init for EZ and VZ DragonBall chips
Diffstat (limited to 'arch/m68k/include/asm')
-rw-r--r-- | arch/m68k/include/asm/m525xsim.h | 2 | ||||
-rw-r--r-- | arch/m68k/include/asm/m54xxsim.h | 12 | ||||
-rw-r--r-- | arch/m68k/include/asm/mcfgpio.h | 12 |
3 files changed, 18 insertions, 8 deletions
diff --git a/arch/m68k/include/asm/m525xsim.h b/arch/m68k/include/asm/m525xsim.h index e33f5bb6aca8..f186459072e9 100644 --- a/arch/m68k/include/asm/m525xsim.h +++ b/arch/m68k/include/asm/m525xsim.h @@ -105,7 +105,7 @@ /* * QSPI module. */ -#define MCFQSPI_BASE (MCF_MBAR + 0x300) /* Base address QSPI */ +#define MCFQSPI_BASE (MCF_MBAR + 0x400) /* Base address QSPI */ #define MCFQSPI_SIZE 0x40 /* Register set size */ #ifdef CONFIG_M5249 diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h index d3bd83887429..a5fbd17ab0a5 100644 --- a/arch/m68k/include/asm/m54xxsim.h +++ b/arch/m68k/include/asm/m54xxsim.h @@ -55,9 +55,15 @@ /* * Generic GPIO support */ -#define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */ -#define MCFGPIO_IRQ_MAX -1 -#define MCFGPIO_IRQ_VECBASE -1 +#define MCFGPIO_PODR (MCF_MBAR + 0xA00) +#define MCFGPIO_PDDR (MCF_MBAR + 0xA10) +#define MCFGPIO_PPDR (MCF_MBAR + 0xA20) +#define MCFGPIO_SETR (MCF_MBAR + 0xA20) +#define MCFGPIO_CLRR (MCF_MBAR + 0xA30) + +#define MCFGPIO_PIN_MAX 136 /* 128 gpio + 8 eport */ +#define MCFGPIO_IRQ_MAX 8 +#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE /* * EDGE Port support. diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h index c41ebf45f1d0..66203c334c6f 100644 --- a/arch/m68k/include/asm/mcfgpio.h +++ b/arch/m68k/include/asm/mcfgpio.h @@ -139,7 +139,8 @@ static inline void gpio_free(unsigned gpio) #if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) /* * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses * read-modify-write to change an output and a GPIO module which has separate @@ -195,7 +196,8 @@ static inline u32 __mcfgpio_ppdr(unsigned gpio) return MCFSIM2_GPIO1READ; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPPDR; @@ -237,7 +239,8 @@ static inline u32 __mcfgpio_podr(unsigned gpio) return MCFSIM2_GPIO1WRITE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDR; @@ -279,7 +282,8 @@ static inline u32 __mcfgpio_pddr(unsigned gpio) return MCFSIM2_GPIO1ENABLE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDDR; |