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author | Will Deacon <will.deacon@arm.com> | 2013-09-03 19:10:11 +0100 |
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committer | Will Deacon <will.deacon@arm.com> | 2014-10-20 18:49:17 +0100 |
commit | f6b3b7a9fa44ffa01f9c4f5ed13a9c48921e1ff2 (patch) | |
tree | 427de36817a19ed210a3c9ee28fdc5b8ed8388e6 /arch/m32r | |
parent | 62e8abf7161b6a0dd32752cd7c60237988f8bff7 (diff) | |
download | linux-f6b3b7a9fa44ffa01f9c4f5ed13a9c48921e1ff2.tar.bz2 |
ia64: io: implement dummy relaxed accessor macros for writes
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to ia64, which may
be able to be optimised in a similar manner to the relaxed read
accessors at a later date.
Cc: Tony Luck <tony.luck@intel.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/m32r')
0 files changed, 0 insertions, 0 deletions