diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2010-09-22 19:13:16 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2011-01-21 11:55:26 +0100 |
commit | 863018a7a24a29c0862c62e70c89244fdd5a08bf (patch) | |
tree | 951f3e7bc9a6829183f322c34deb0e250e52a2d9 /arch/m32r/platforms/usrv | |
parent | 30139785e615c97497864a89511db02839fa7bf5 (diff) | |
download | linux-863018a7a24a29c0862c62e70c89244fdd5a08bf.tar.bz2 |
m32r: Cleanup direct irq_desc access
The irq descriptors are already initialized by the generic
code. Remove the redundant init code and set the irq chip with the
proper accessor function.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/m32r/platforms/usrv')
-rw-r--r-- | arch/m32r/platforms/usrv/setup.c | 45 |
1 files changed, 9 insertions, 36 deletions
diff --git a/arch/m32r/platforms/usrv/setup.c b/arch/m32r/platforms/usrv/setup.c index 1beac7a51ed4..d6eb586a099e 100644 --- a/arch/m32r/platforms/usrv/setup.c +++ b/arch/m32r/platforms/usrv/setup.c @@ -156,53 +156,35 @@ void __init init_IRQ(void) once++; /* MFT2 : system timer */ - irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type; - irq_desc[M32R_IRQ_MFT2].action = 0; - irq_desc[M32R_IRQ_MFT2].depth = 1; + set_irq_chip(M32R_IRQ_MFT2, &mappi_irq_type); icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; disable_mappi_irq(M32R_IRQ_MFT2); #if defined(CONFIG_SERIAL_M32R_SIO) /* SIO0_R : uart receive data */ - irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type; - irq_desc[M32R_IRQ_SIO0_R].action = 0; - irq_desc[M32R_IRQ_SIO0_R].depth = 1; + set_irq_chip(M32R_IRQ_SIO0_R, &mappi_irq_type); icu_data[M32R_IRQ_SIO0_R].icucr = 0; disable_mappi_irq(M32R_IRQ_SIO0_R); /* SIO0_S : uart send data */ - irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type; - irq_desc[M32R_IRQ_SIO0_S].action = 0; - irq_desc[M32R_IRQ_SIO0_S].depth = 1; + set_irq_chip(M32R_IRQ_SIO0_S, &mappi_irq_type); icu_data[M32R_IRQ_SIO0_S].icucr = 0; disable_mappi_irq(M32R_IRQ_SIO0_S); /* SIO1_R : uart receive data */ - irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type; - irq_desc[M32R_IRQ_SIO1_R].action = 0; - irq_desc[M32R_IRQ_SIO1_R].depth = 1; + set_irq_chip(M32R_IRQ_SIO1_R, &mappi_irq_type); icu_data[M32R_IRQ_SIO1_R].icucr = 0; disable_mappi_irq(M32R_IRQ_SIO1_R); /* SIO1_S : uart send data */ - irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type; - irq_desc[M32R_IRQ_SIO1_S].action = 0; - irq_desc[M32R_IRQ_SIO1_S].depth = 1; + set_irq_chip(M32R_IRQ_SIO1_S, &mappi_irq_type); icu_data[M32R_IRQ_SIO1_S].icucr = 0; disable_mappi_irq(M32R_IRQ_SIO1_S); #endif /* CONFIG_SERIAL_M32R_SIO */ /* INT#67-#71: CFC#0 IREQ on PLD */ for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) { - irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type; - irq_desc[PLD_IRQ_CF0 + i].action = 0; - irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */ + set_irq_chip(PLD_IRQ_CF0 + i, &m32700ut_pld_irq_type); pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr = PLD_ICUCR_ISMOD01; /* 'L' level sense */ disable_m32700ut_pld_irq(PLD_IRQ_CF0 + i); @@ -210,19 +192,13 @@ void __init init_IRQ(void) #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) /* INT#76: 16552D#0 IREQ on PLD */ - irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type; - irq_desc[PLD_IRQ_UART0].action = 0; - irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */ + set_irq_chip(PLD_IRQ_UART0, &m32700ut_pld_irq_type); pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr = PLD_ICUCR_ISMOD03; /* 'H' level sense */ disable_m32700ut_pld_irq(PLD_IRQ_UART0); /* INT#77: 16552D#1 IREQ on PLD */ - irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type; - irq_desc[PLD_IRQ_UART1].action = 0; - irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */ + set_irq_chip(PLD_IRQ_UART1, &m32700ut_pld_irq_type); pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr = PLD_ICUCR_ISMOD03; /* 'H' level sense */ disable_m32700ut_pld_irq(PLD_IRQ_UART1); @@ -230,10 +206,7 @@ void __init init_IRQ(void) #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE) /* INT#80: AK4524 IREQ on PLD */ - irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type; - irq_desc[PLD_IRQ_SNDINT].action = 0; - irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */ + set_irq_chip(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type); pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr = PLD_ICUCR_ISMOD01; /* 'L' level sense */ disable_m32700ut_pld_irq(PLD_IRQ_SNDINT); |