diff options
| author | Guo Ren <guoren@linux.alibaba.com> | 2020-07-28 10:44:57 +0000 |
|---|---|---|
| committer | Guo Ren <guoren@linux.alibaba.com> | 2020-07-31 01:51:29 +0000 |
| commit | 8077e66bc381988d0ef6f60d2eb71d8812b26333 (patch) | |
| tree | 758bb09d6c122dfe43d74fce40c3478e70ae5afc /arch/csky | |
| parent | e95a4f8cb985e759648b32ed0b721a472deb86a5 (diff) | |
| download | linux-8077e66bc381988d0ef6f60d2eb71d8812b26333.tar.bz2 | |
csky: Add cpu feature register hint for smp
CPU features registers are setup by customers' bootloader, but
Linux must help transfer them from the primary to secondary cores.
This patch add hint2 CPU feature register supported.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/csky')
| -rw-r--r-- | arch/csky/kernel/smp.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c index b5c5bc3afeb5..1945fb29007d 100644 --- a/arch/csky/kernel/smp.c +++ b/arch/csky/kernel/smp.c @@ -156,6 +156,7 @@ void __init setup_smp(void) extern void _start_smp_secondary(void); volatile unsigned int secondary_hint; +volatile unsigned int secondary_hint2; volatile unsigned int secondary_ccr; volatile unsigned int secondary_stack; @@ -168,6 +169,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle) secondary_stack = (unsigned int) task_stack_page(tidle) + THREAD_SIZE - 8; secondary_hint = mfcr("cr31"); + secondary_hint2 = mfcr("cr<21, 1>"); secondary_ccr = mfcr("cr18"); secondary_msa1 = read_mmu_msa1(); @@ -209,6 +211,7 @@ void csky_start_secondary(void) unsigned int cpu = smp_processor_id(); mtcr("cr31", secondary_hint); + mtcr("cr<21, 1>", secondary_hint2); mtcr("cr18", secondary_ccr); mtcr("vbr", vec_base); |