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| author | Sara Sharon <sara.sharon@intel.com> | 2018-04-23 09:38:41 +0300 |
|---|---|---|
| committer | Luca Coelho <luciano.coelho@intel.com> | 2018-08-31 11:38:33 +0300 |
| commit | e506b481642a9e8d71e82f0facd250a917f24aa1 (patch) | |
| tree | 150418994e3497f6062d88cabdf78aa9a871151c /arch/c6x/boot | |
| parent | 3baf7528d6f832b28622d1ddadd2e47f6c2b5e08 (diff) | |
| download | linux-e506b481642a9e8d71e82f0facd250a917f24aa1.tar.bz2 | |
iwlwifi: pcie: set interrupt coalescing also for gen2
We offloaded all the RX configuration of init to firmware. However,
the configuration of interrupt coalescing was left hanging - it wasn't
offloaded nor was it written by host.
This write to the CSR is allowed in gen2, so the host can do it.
Without it we have various issues with RX fullness.
Signed-off-by: Sara Sharon <sara.sharon@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Diffstat (limited to 'arch/c6x/boot')
0 files changed, 0 insertions, 0 deletions