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authorYi Li <yi.li@analog.com>2009-01-07 23:14:39 +0800
committerBryan Wu <cooloney@kernel.org>2009-01-07 23:14:39 +0800
commit6a01f230339321292cf065551f8cf55361052461 (patch)
tree7ac2ac8fc9f05a7315ef6a7f6f0a387433c62c14 /arch/blackfin/mach-bf533
parent5105432a3201e3f0e6c219cd0a74feee1e5e262b (diff)
downloadlinux-6a01f230339321292cf065551f8cf55361052461.tar.bz2
Blackfin arch: merge adeos blackfin part to arch/blackfin/
[Mike Frysinger <vapier.adi@gmail.com>: - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf533')
-rw-r--r--arch/blackfin/mach-bf533/Kconfig2
-rw-r--r--arch/blackfin/mach-bf533/include/mach/cdefBF532.h16
-rw-r--r--arch/blackfin/mach-bf533/include/mach/irq.h6
3 files changed, 12 insertions, 12 deletions
diff --git a/arch/blackfin/mach-bf533/Kconfig b/arch/blackfin/mach-bf533/Kconfig
index 76beb75f12da..14427de7d77f 100644
--- a/arch/blackfin/mach-bf533/Kconfig
+++ b/arch/blackfin/mach-bf533/Kconfig
@@ -59,7 +59,7 @@ config DMA7_UARTTX
default 10
config TIMER0
int "TIMER0"
- default 11
+ default 8
config TIMER1
int "TIMER1"
default 11
diff --git a/arch/blackfin/mach-bf533/include/mach/cdefBF532.h b/arch/blackfin/mach-bf533/include/mach/cdefBF532.h
index d7b08f638ea4..bbc3c8386d48 100644
--- a/arch/blackfin/mach-bf533/include/mach/cdefBF532.h
+++ b/arch/blackfin/mach-bf533/include/mach/cdefBF532.h
@@ -684,10 +684,10 @@
static inline void bfin_write_FIO_FLAG_##name(unsigned short val) \
{ \
unsigned long flags; \
- local_irq_save(flags); \
+ local_irq_save_hw(flags); \
bfin_write16(FIO_FLAG_##name, val); \
bfin_read_CHIPID(); \
- local_irq_restore(flags); \
+ local_irq_restore_hw(flags); \
}
BFIN_WRITE_FIO_FLAG(D)
BFIN_WRITE_FIO_FLAG(C)
@@ -699,10 +699,10 @@ static inline u16 bfin_read_FIO_FLAG_##name(void) \
{ \
unsigned long flags; \
u16 ret; \
- local_irq_save(flags); \
+ local_irq_save_hw(flags); \
ret = bfin_read16(FIO_FLAG_##name); \
bfin_read_CHIPID(); \
- local_irq_restore(flags); \
+ local_irq_restore_hw(flags); \
return ret; \
}
BFIN_READ_FIO_FLAG(D)
@@ -729,7 +729,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val)
if (val == bfin_read_PLL_CTL())
return;
- local_irq_save(flags);
+ local_irq_save_hw(flags);
/* Enable the PLL Wakeup bit in SIC IWR */
iwr = bfin_read32(SIC_IWR);
/* Only allow PPL Wakeup) */
@@ -740,7 +740,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val)
asm("IDLE;");
bfin_write32(SIC_IWR, iwr);
- local_irq_restore(flags);
+ local_irq_restore_hw(flags);
}
/* Writing to VR_CTL initiates a PLL relock sequence. */
@@ -751,7 +751,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
if (val == bfin_read_VR_CTL())
return;
- local_irq_save(flags);
+ local_irq_save_hw(flags);
/* Enable the PLL Wakeup bit in SIC IWR */
iwr = bfin_read32(SIC_IWR);
/* Only allow PPL Wakeup) */
@@ -762,7 +762,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
asm("IDLE;");
bfin_write32(SIC_IWR, iwr);
- local_irq_restore(flags);
+ local_irq_restore_hw(flags);
}
#endif /* _CDEF_BF532_H */
diff --git a/arch/blackfin/mach-bf533/include/mach/irq.h b/arch/blackfin/mach-bf533/include/mach/irq.h
index e7dd315159df..db1e346cd1aa 100644
--- a/arch/blackfin/mach-bf533/include/mach/irq.h
+++ b/arch/blackfin/mach-bf533/include/mach/irq.h
@@ -100,9 +100,9 @@ Core Emulation **
#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */
#define IRQ_UART0_RX 21 /*DMA6 Interrupt (UART RX) */
#define IRQ_UART0_TX 22 /*DMA7 Interrupt (UART TX) */
-#define IRQ_TMR0 23 /*Timer 0 */
-#define IRQ_TMR1 24 /*Timer 1 */
-#define IRQ_TMR2 25 /*Timer 2 */
+#define IRQ_TIMER0 23 /*Timer 0 */
+#define IRQ_TIMER1 24 /*Timer 1 */
+#define IRQ_TIMER2 25 /*Timer 2 */
#define IRQ_PROG_INTA 26 /*Programmable Flags A (8) */
#define IRQ_PROG_INTB 27 /*Programmable Flags B (8) */
#define IRQ_MEM_DMA0 28 /*DMA8/9 Interrupt (Memory DMA Stream 0) */