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| author | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-06-21 14:36:59 +0200 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2013-06-21 16:52:00 +0200 |
| commit | a008dad702a55b27720760ab0f8a129dde49fb6e (patch) | |
| tree | c0448d5054953c84d8fc67c15bba1d562ff80e19 /arch/arm | |
| parent | 546c830c90beb7d3e398007715fd1b631c6c060a (diff) | |
| download | linux-a008dad702a55b27720760ab0f8a129dde49fb6e.tar.bz2 | |
ARM: at91: cpuidle: Fix target_residency
The following commit:
commit 7e348b9012522fa0efd854d20d210d5e57fcedd1
Author: Robert Lee <rob.lee@linaro.org>
Date: Tue Mar 20 15:22:43 2012 -0500
ARM: at91: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
introduced an additional zero to the state1 (suspend) target residency.
With a periodic tick, the cpu never enters the state1 with both 10000 and
100000.
With a tickless system, it enters to state1 much more often with the
initial value, roughly x7 more.
Fix it by setting the value to 10ms again.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[nicola.ferre@atmel.com: add precisions given by Daniel to commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-at91/cpuidle.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c index 69f9e3bbf4e5..4ec6a6d9b9be 100644 --- a/arch/arm/mach-at91/cpuidle.c +++ b/arch/arm/mach-at91/cpuidle.c @@ -51,7 +51,7 @@ static struct cpuidle_driver at91_idle_driver = { .states[1] = { .enter = at91_enter_idle, .exit_latency = 10, - .target_residency = 100000, + .target_residency = 10000, .flags = CPUIDLE_FLAG_TIME_VALID, .name = "RAM_SR", .desc = "WFI and DDR Self Refresh", |