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authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2013-07-02 13:03:37 +0200
committerJason Cooper <jason@lakedaemon.net>2013-07-25 21:06:58 +0000
commit953b710cd53718e5cef9d8c54231b8f234e4f67e (patch)
tree83bba370163a4979c5b870a288d99ef3e0cd0906 /arch/arm
parent497d3d0f1899eeabdfe9c6e0095c162e72b6a6a6 (diff)
downloadlinux-953b710cd53718e5cef9d8c54231b8f234e4f67e.tar.bz2
ARM: dove: move device tree nodes to DT irqchip and clocksource
With recent support for true irqchip and clocksource drivers for Orion SoCs, now make use of it on DT enabled Dove boards. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/dove.dtsi21
1 files changed, 19 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 8612658ec3c1..8d5be1e856f2 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -30,11 +30,28 @@
marvell,tauros2-cache-features = <0>;
};
- intc: interrupt-controller {
+ timer: timer@20300 {
+ compatible = "marvell,orion-timer";
+ reg = <0x20300 0x20>;
+ interrupt-parent = <&bridge_intc>;
+ interrupts = <1>, <2>;
+ clocks = <&core_clk 0>;
+ };
+
+ intc: main-interrupt-ctrl@20200 {
compatible = "marvell,orion-intc";
interrupt-controller;
#interrupt-cells = <1>;
- reg = <0x20204 0x04>, <0x20214 0x04>;
+ reg = <0x20200 0x10>, <0x20210 0x10>;
+ };
+
+ bridge_intc: bridge-interrupt-ctrl@20110 {
+ compatible = "marvell,orion-bridge-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x20110 0x8>;
+ interrupts = <0>;
+ marvell,#interrupts = <5>;
};
core_clk: core-clocks@d0214 {