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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-03-15 23:07:07 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 00:48:33 +0100 |
| commit | 5f47c38704e15f9db356dd799391bc9f9efc4e0c (patch) | |
| tree | 99d945b03e8e7a49c43998d5249802c951f2155b /arch/arm | |
| parent | 051334bdc5252362500a686100d9ec20cbfdcd8a (diff) | |
| download | linux-5f47c38704e15f9db356dd799391bc9f9efc4e0c.tar.bz2 | |
ARM: l2c: add decode for L2C-220 cache ways
Rather than assuming these are always 8-way, it can be decoded from the
auxillary register in the same manner as L2C-210.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index b4dd2f4b491b..69a18316b239 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -701,6 +701,7 @@ static void __init __l2c_init(const struct l2c_init_data *data, break; case L2X0_CACHE_ID_PART_L210: + case L2X0_CACHE_ID_PART_L220: ways = (aux >> 13) & 0xf; break; |