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authorRafał Miłecki <zajec5@gmail.com>2016-04-19 08:56:46 +0200
committerFlorian Fainelli <f.fainelli@gmail.com>2016-04-22 11:59:29 -0700
commit1b47b98acce2db0da632d056821420b33205b8b2 (patch)
treed0809f54eb20a5b0c23ef01220a3d830f11269d6 /arch/arm
parent5a6516ff135555aa53c7d156cd3973b826e011f9 (diff)
downloadlinux-1b47b98acce2db0da632d056821420b33205b8b2.tar.bz2
ARM: BCM5301X: Add DT entry for SPI controller and NOR flash
Controller is present on every BCM4708* board but only few devices have serial flash attached so mark it as disabled by default. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts4
-rw-r--r--arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts4
-rw-r--r--arch/arm/boot/dts/bcm5301x.dtsi14
3 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
index c973f768dd14..1c7e53d60aa4 100644
--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
@@ -59,3 +59,7 @@
&uart0 {
status = "okay";
};
+
+&spi_nor {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
index 4d610ff40e1b..8b0c440b2e71 100644
--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
@@ -122,3 +122,7 @@
&uart0 {
status = "okay";
};
+
+&spi_nor {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 9c06d91e0c8a..7d4d29bf0ed3 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -225,6 +225,20 @@
#address-cells = <1>;
#size-cells = <1>;
};
+
+ spi@29000 {
+ reg = <0x00029000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spi_nor: spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ linux,part-probe = "ofpart", "bcm47xxpart";
+ status = "disabled";
+ };
+ };
};
lcpll0: lcpll0@1800c100 {