diff options
author | afzal mohammed <afzal.mohd.ma@gmail.com> | 2020-03-27 18:14:22 +0530 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2020-03-27 14:11:47 +0100 |
commit | 4c819924f571fb74496c85df2780dc75f8686b68 (patch) | |
tree | ae3904111b217ddcb170affb18f3c19a2a22dd29 /arch/arm | |
parent | c84e48997ccafc9990a267fe6508f72027bd1bcf (diff) | |
download | linux-4c819924f571fb74496c85df2780dc75f8686b68.tar.bz2 |
ARM: cns3xxx: replace setup_irq() by request_irq()
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.
Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.
Hence replace setup_irq() by request_irq().
[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos
Link: https://lore.kernel.org/r/20200327124422.4181-1-afzal.mohd.ma@gmail.com
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-cns3xxx/core.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 1d61a7701c11..e4f4b20b83a2 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -189,12 +189,6 @@ static irqreturn_t cns3xxx_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction cns3xxx_timer_irq = { - .name = "timer", - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .handler = cns3xxx_timer_interrupt, -}; - /* * Set up the clock source and clock events devices */ @@ -245,7 +239,9 @@ static void __init __cns3xxx_timer_init(unsigned int timer_irq) writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); /* Make irqs happen for the system timer */ - setup_irq(timer_irq, &cns3xxx_timer_irq); + if (request_irq(timer_irq, cns3xxx_timer_interrupt, + IRQF_TIMER | IRQF_IRQPOLL, "timer", NULL)) + pr_err("Failed to request irq %d (timer)\n", timer_irq); cns3xxx_clockevents_init(timer_irq); } |