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| author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2013-01-05 13:57:38 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-01-06 17:54:08 +0000 |
| commit | d106de38ca927f2a53cd56ef94c506e8f6bd37e1 (patch) | |
| tree | ca44d4eda03c584274a810327af73391c31ed3b4 /arch/arm | |
| parent | a47e3bc10d0e34a67e10a9f8150a144af654be2a (diff) | |
| download | linux-d106de38ca927f2a53cd56ef94c506e8f6bd37e1.tar.bz2 | |
ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b
If CONFIG_ARCH_MULTIPLATFORM & CONFIG_ARCH_MVEBU are both enabled,
__v7_pj4b_setup is added between __v7_ca9mp_setup and __v7_setup.
But there's no jump instruction added. If the chip is Cortex A5/A9,
it goes through __v7_pj4b_setup also. It results in system hang.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 26a62054f0c3..3a3c015f8d5c 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -169,6 +169,7 @@ __v7_ca15mp_setup: orreq r0, r0, r10 @ Enable CPU-specific SMP bits mcreq p15, 0, r0, c1, c0, 1 #endif + b __v7_setup __v7_pj4b_setup: #ifdef CONFIG_CPU_PJ4B |