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| author | Sanchayan Maity <maitysanchayan@gmail.com> | 2015-10-18 11:18:48 +0530 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2015-11-23 11:35:14 +0800 |
| commit | 3fa2f9496554bc23eb62f958c920e9fcee7ba232 (patch) | |
| tree | 83e3bb5d35eae13d6d40ba0b8ae5fc1aacf760fd /arch/arm | |
| parent | 8005c49d9aea74d382f474ce11afbbc7d7130bec (diff) | |
| download | linux-3fa2f9496554bc23eb62f958c920e9fcee7ba232.tar.bz2 | |
ARM: dts: vfxxx: Fix erroneous property in esdhc0 node
Something seems to have gone wrong during the merging of the device
tree changes with the following patch
"ARM: dts: add property for maximum ADC clock frequencies"
The property "fsl,adck-max-frequency" instead of being applied for
the ADC1 node got applied to the esdhc0 node. This patch fixes it.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Fixes: def0641e2f61 ("ARM: dts: add property for maximum ADC clock frequencies")
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/vfxxx.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 6736bae43a5b..a64bfe1a4dd9 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -461,6 +461,8 @@ clock-names = "adc"; #io-channel-cells = <1>; status = "disabled"; + fsl,adck-max-frequency = <30000000>, <40000000>, + <20000000>; }; esdhc0: esdhc@400b1000 { @@ -472,8 +474,6 @@ <&clks VF610_CLK_ESDHC0>; clock-names = "ipg", "ahb", "per"; status = "disabled"; - fsl,adck-max-frequency = <30000000>, <40000000>, - <20000000>; }; esdhc1: esdhc@400b2000 { |