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authorAnson Huang <anson.huang@nxp.com>2018-11-20 01:35:34 +0000
committerShawn Guo <shawnguo@kernel.org>2018-12-10 10:02:25 +0800
commit3f343ec3eabcded338b62c04eadc8173955ec64e (patch)
tree4cc3fea90081fafe142389c22e1c711350c84148 /arch/arm
parent4d8aa0097dcc5285c4cbc2d709188dc19e967599 (diff)
downloadlinux-3f343ec3eabcded338b62c04eadc8173955ec64e.tar.bz2
ARM: dts: imx7d-sdb: add rev-a board support
Current imx7d-sdb.dts has some incorrect settings about Rev-A and Rev-B boards, some of the settings are based on Rev-A board but some are based on Rev-B board, clean up it by adding i.MX7D SDB Rev-A board support, make default imx7d-sdb.dts for Rev-B board as usual, and introduce imx7d-sdb-reva.dts for Rev-A board. Below are the affected differences of Rev-A and Rev-B board: Rev-A Rev-B USB_OTG2_PWR: UART3_CTS_B GPIO1_IO07 ENET_EN_B: None GPIO1_IO04 TP_INT_B: EPDC_DATA13 EPDC_BDR1 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/imx7d-sdb-reva.dts40
-rw-r--r--arch/arm/boot/dts/imx7d-sdb.dts28
3 files changed, 67 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index db95cf7c57ae..fbdabfbc5213 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -574,6 +574,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-pico-pi.dtb \
imx7d-sbc-imx7.dtb \
imx7d-sdb.dtb \
+ imx7d-sdb-reva.dtb \
imx7d-sdb-sht11.dtb \
imx7s-colibri-eval-v3.dtb \
imx7s-warp.dtb
diff --git a/arch/arm/boot/dts/imx7d-sdb-reva.dts b/arch/arm/boot/dts/imx7d-sdb-reva.dts
new file mode 100644
index 000000000000..7ce9d8c91985
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-sdb-reva.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Copyright (C) 2015 Freescale Semiconductor, Inc.
+
+/dts-v1/;
+
+#include "imx7d-sdb.dts"
+
+/ {
+ reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
+ pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg_reva>;
+ gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&fec2 {
+ /delete-property/phy-supply;
+};
+
+&iomuxc {
+ imx7d-sdb {
+ pinctrl_tsc2046_pendown: tsc2046_pendown {
+ fsl,pins = <
+ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x59
+ >;
+ };
+
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */
+ >;
+ };
+
+ pinctrl_usb_otg2_vbus_reg_reva: usbotg2vbusregrevagrp {
+ fsl,pins = <
+ MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
+ >;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index b1b613bb817d..202922ed3754 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -72,9 +72,11 @@
reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg2_vbus";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
@@ -115,6 +117,16 @@
gpio = <&gpio2 14 GPIO_ACTIVE_LOW>;
};
+ reg_fec2_3v3: regulator-fec2-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "fec2-3v3";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2_reg>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ };
+
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000 0>;
@@ -211,6 +223,7 @@
assigned-clock-rates = <0>, <100000000>;
phy-mode = "rgmii";
phy-handle = <&ethphy1>;
+ phy-supply = <&reg_fec2_3v3>;
fsl,magic-packet;
status = "okay";
};
@@ -492,6 +505,12 @@
>;
};
+ pinctrl_enet2_reg: enet2reggrp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x14
+ >;
+ };
+
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
@@ -514,7 +533,6 @@
pinctrl_hog: hoggrp {
fsl,pins = <
- MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */
>;
};
@@ -736,4 +754,10 @@
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x30
>;
};
+
+ pinctrl_usb_otg2_vbus_reg: usbotg2vbusreggrp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14
+ >;
+ };
};