diff options
| author | Fabio Estevam <fabio.estevam@freescale.com> | 2012-08-20 09:39:22 -0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-09-11 11:52:28 +0200 |
| commit | 48540058612786d365602f3324ed97f9071092de (patch) | |
| tree | dd7e1324872699485b987889b2ac03d8fcb38c6c /arch/arm | |
| parent | 912bfe76528c287bc4812521b8d53366954b39a5 (diff) | |
| download | linux-48540058612786d365602f3324ed97f9071092de.tar.bz2 | |
ARM: clk-imx35: Fix SSI clock registration
SSI block has two types of clock:
ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.
Currently SSI driver only supports slave mode and only need to handle
the ipg clock, because the peripheral clock comes from the master codec.
Only register the ipg clock and do not register the peripheral clock for ssi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx35.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index c6422fb10bae..65fb8bcd86cb 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -230,10 +230,8 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); - clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0"); - clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0"); - clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1"); - clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1"); + clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); + clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); /* i.mx35 has the i.mx21 type uart */ clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); |