diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2016-08-31 12:05:14 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2016-09-02 11:47:51 +0100 |
| commit | 9dcf7914ae238619ae019dcf82a91c817ff8628e (patch) | |
| tree | 467135c4d1457e1e3cd95dbe338aee8dd06c81a1 /arch/arm64/kernel/head.S | |
| parent | 3c5e9f238bc475b0712419eaebc643c07c73cb94 (diff) | |
| download | linux-9dcf7914ae238619ae019dcf82a91c817ff8628e.tar.bz2 | |
arm64: kernel: use x30 for __enable_mmu return address
Using x27 for passing to __enable_mmu what is essentially the return
address makes the code look more complicated than it needs to be. So
switch to x30/lr, and update the secondary and cpu_resume call sites to
simply call __enable_mmu as an ordinary function, with a bl instruction.
This requires the callers to be covered by .idmap.text.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/head.S')
| -rw-r--r-- | arch/arm64/kernel/head.S | 21 |
1 files changed, 7 insertions, 14 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 5543068da3ae..45b865e022cc 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -675,9 +675,9 @@ secondary_startup: * Common entry point for secondary CPUs. */ bl __cpu_setup // initialise processor - - adr_l x27, __secondary_switch // address to jump to after enabling the MMU - b __enable_mmu + bl __enable_mmu + ldr x8, =__secondary_switched + br x8 ENDPROC(secondary_startup) __secondary_switched: @@ -716,9 +716,9 @@ ENDPROC(__secondary_switched) * Enable the MMU. * * x0 = SCTLR_EL1 value for turning on the MMU. - * x27 = *virtual* address to jump to upon completion * - * Other registers depend on the function called upon completion. + * Returns to the caller via x30/lr. This requires the caller to be covered + * by the .idmap.text section. * * Checks if the selected granule size is supported by the CPU. * If it isn't, park the CPU @@ -744,7 +744,7 @@ ENTRY(__enable_mmu) ic iallu dsb nsh isb - br x27 + ret ENDPROC(__enable_mmu) __no_granule_support: @@ -789,9 +789,7 @@ __primary_switch: mrs x20, sctlr_el1 // preserve old SCTLR_EL1 value #endif - adr x27, 0f - b __enable_mmu -0: + bl __enable_mmu #ifdef CONFIG_RELOCATABLE bl __relocate_kernel #ifdef CONFIG_RANDOMIZE_BASE @@ -822,8 +820,3 @@ __primary_switch: ldr x8, =__primary_switched br x8 ENDPROC(__primary_switch) - -__secondary_switch: - ldr x8, =__secondary_switched - br x8 -ENDPROC(__secondary_switch) |