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author | Marc Zyngier <marc.zyngier@arm.com> | 2018-08-06 13:03:36 +0100 |
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committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-08-12 12:06:35 +0100 |
commit | 03bd646d863d1e4399d9dec658e1e5735f24cd2c (patch) | |
tree | ebfbc2ab4b1c2147f476b5a69d9627901a2a9fca /arch/arm64/include/asm/sysreg.h | |
parent | 6249f2a479268702f7259aeee3671db2be3b922c (diff) | |
download | linux-03bd646d863d1e4399d9dec658e1e5735f24cd2c.tar.bz2 |
KVM: arm64: vgic-v3: Add support for ICC_SGI0R_EL1 and ICC_ASGI1R_EL1 accesses
In order to generate Group0 SGIs, let's add some decoding logic to
access_gic_sgi(), and pass the generating group accordingly.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/sysreg.h')
-rw-r--r-- | arch/arm64/include/asm/sysreg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 98af0b37fb31..b0d2a52a71a3 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -314,6 +314,8 @@ #define SYS_ICC_DIR_EL1 sys_reg(3, 0, 12, 11, 1) #define SYS_ICC_RPR_EL1 sys_reg(3, 0, 12, 11, 3) #define SYS_ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5) +#define SYS_ICC_ASGI1R_EL1 sys_reg(3, 0, 12, 11, 6) +#define SYS_ICC_SGI0R_EL1 sys_reg(3, 0, 12, 11, 7) #define SYS_ICC_IAR1_EL1 sys_reg(3, 0, 12, 12, 0) #define SYS_ICC_EOIR1_EL1 sys_reg(3, 0, 12, 12, 1) #define SYS_ICC_HPPIR1_EL1 sys_reg(3, 0, 12, 12, 2) |