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authorWill Deacon <will.deacon@arm.com>2016-09-22 11:35:43 +0100
committerWill Deacon <will.deacon@arm.com>2017-02-02 18:33:01 +0000
commitf85279b4bd481a1a0697c1d2a8a5f15de216b120 (patch)
tree85ae5ff3b6cfae4ea9ef703d31cfd0a2e46e9983 /arch/arm64/include/asm/kvm_arm.h
parent3d29a9a0f88300b7ccb642ebee61b331ef0a8c27 (diff)
downloadlinux-f85279b4bd481a1a0697c1d2a8a5f15de216b120.tar.bz2
arm64: KVM: Save/restore the host SPE state when entering/leaving a VM
The SPE buffer is virtually addressed, using the page tables of the CPU MMU. Unusually, this means that the EL0/1 page table may be live whilst we're executing at EL2 on non-VHE configurations. When VHE is in use, we can use the same property to profile the guest behind its back. This patch adds the relevant disabling and flushing code to KVM so that the host can make use of SPE without corrupting guest memory, and any attempts by a guest to use SPE will result in a trap. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/kvm_arm.h')
-rw-r--r--arch/arm64/include/asm/kvm_arm.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 2a2752b5b6aa..6e99978e83bd 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -188,6 +188,9 @@
#define CPTR_EL2_DEFAULT 0x000033ff
/* Hyp Debug Configuration Register bits */
+#define MDCR_EL2_TPMS (1 << 14)
+#define MDCR_EL2_E2PB_MASK (UL(0x3))
+#define MDCR_EL2_E2PB_SHIFT (UL(12))
#define MDCR_EL2_TDRA (1 << 11)
#define MDCR_EL2_TDOSA (1 << 10)
#define MDCR_EL2_TDA (1 << 9)