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authorDavid S. Miller <davem@davemloft.net>2015-03-20 18:51:09 -0400
committerDavid S. Miller <davem@davemloft.net>2015-03-20 18:51:09 -0400
commit0fa74a4be48e0f810d3dc6ddbc9d6ac7e86cbee8 (patch)
treeccfee93ede4e36d6d355e00e485d3d1c0fec0bdd /arch/arm64/include/asm/kvm_arm.h
parent6626af692692b52c8f9e20ad8201a3255e5ab25b (diff)
parent4de930efc23b92ddf88ce91c405ee645fe6e27ea (diff)
downloadlinux-0fa74a4be48e0f810d3dc6ddbc9d6ac7e86cbee8.tar.bz2
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts: drivers/net/ethernet/emulex/benet/be_main.c net/core/sysctl_net_core.c net/ipv4/inet_diag.c The be_main.c conflict resolution was really tricky. The conflict hunks generated by GIT were very unhelpful, to say the least. It split functions in half and moved them around, when the real actual conflict only existed solely inside of one function, that being be_map_pci_bars(). So instead, to resolve this, I checked out be_main.c from the top of net-next, then I applied the be_main.c changes from 'net' since the last time I merged. And this worked beautifully. The inet_diag.c and sysctl_net_core.c conflicts were simple overlapping changes, and were easily to resolve. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arm64/include/asm/kvm_arm.h')
-rw-r--r--arch/arm64/include/asm/kvm_arm.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 94674eb7e7bb..54bb4ba97441 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -129,6 +129,9 @@
* 40 bits wide (T0SZ = 24). Systems with a PARange smaller than 40 bits are
* not known to exist and will break with this configuration.
*
+ * VTCR_EL2.PS is extracted from ID_AA64MMFR0_EL1.PARange at boot time
+ * (see hyp-init.S).
+ *
* Note that when using 4K pages, we concatenate two first level page tables
* together.
*
@@ -138,7 +141,6 @@
#ifdef CONFIG_ARM64_64K_PAGES
/*
* Stage2 translation configuration:
- * 40bits output (PS = 2)
* 40bits input (T0SZ = 24)
* 64kB pages (TG0 = 1)
* 2 level page tables (SL = 1)
@@ -150,7 +152,6 @@
#else
/*
* Stage2 translation configuration:
- * 40bits output (PS = 2)
* 40bits input (T0SZ = 24)
* 4kB pages (TG0 = 0)
* 3 level page tables (SL = 1)