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author | Julien Thierry <julien.thierry@arm.com> | 2019-01-31 14:58:39 +0000 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2019-02-06 10:05:16 +0000 |
commit | 5870970b9a828d8693aa6d15742573289d7dbcd0 (patch) | |
tree | 5690841213b98793f73f6e8472605dd4e51efdb2 /arch/arm64/include/asm/assembler.h | |
parent | e26a433147065e9b1503df0b3e12296389cdfa94 (diff) | |
download | linux-5870970b9a828d8693aa6d15742573289d7dbcd0.tar.bz2 |
arm64: Fix HCR.TGE status for NMI contexts
When using VHE, the host needs to clear HCR_EL2.TGE bit in order
to interact with guest TLBs, switching from EL2&0 translation regime
to EL1&0.
However, some non-maskable asynchronous event could happen while TGE is
cleared like SDEI. Because of this address translation operations
relying on EL2&0 translation regime could fail (tlb invalidation,
userspace access, ...).
Fix this by properly setting HCR_EL2.TGE when entering NMI context and
clear it if necessary when returning to the interrupted context.
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: James Morse <james.morse@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: linux-arch@vger.kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/assembler.h')
0 files changed, 0 insertions, 0 deletions