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author | Carlo Caione <carlo@endlessm.com> | 2016-05-02 10:02:18 +0200 |
---|---|---|
committer | Kevin Hilman <khilman@baylibre.com> | 2016-06-01 10:56:43 -0700 |
commit | f40d437f55264b2f48446b9cb9b8d7db5f588770 (patch) | |
tree | 3b7a797c1051cfd21a6c14d6a96ae022399b10c8 /arch/arm64/boot | |
parent | 551a626c9b1b2c2d983e75fb75c20935eff67abb (diff) | |
download | linux-f40d437f55264b2f48446b9cb9b8d7db5f588770.tar.bz2 |
ARM64: dts: amlogic: Enable pin controller on GXBB-based platforms
Update DTS and DTSI files to enable the pin controller. We also now
support the blinking blue LED on the Odroid-C2.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 13 | ||||
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 41 |
4 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts index 7f2c6747a71e..41e1e669bc70 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts @@ -45,6 +45,7 @@ /dts-v1/; #include "meson-gxbb.dtsi" +#include <dt-bindings/gpio/gpio.h> / { compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; @@ -62,8 +63,20 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; + + leds { + compatible = "gpio-leds"; + blue { + label = "c2:blue:alive"; + gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; }; &uart_AO { status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi index bf7ff1d41851..22e629841a99 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi @@ -62,4 +62,6 @@ /* This UART is brought out to the DB9 connector */ &uart_AO { status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi index 012cdccc8a35..54bb7c739089 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi @@ -56,4 +56,7 @@ &uart_AO { status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 3126f0c44469..6dd27685e31e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -43,6 +43,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/gpio/meson-gxbb-gpio.h> / { compatible = "amlogic,meson-gxbb"; @@ -158,6 +159,29 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; + pinctrl_aobus: pinctrl@14 { + compatible = "amlogic,meson-gxbb-aobus-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio_ao: bank@14 { + reg = <0x0 0x00014 0x0 0x8>, + <0x0 0x0002c 0x0 0x4>, + <0x0 0x00024 0x0 0x8>; + reg-names = "mux", "pull", "gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + uart_ao_a_pins: uart_ao_a { + mux { + groups = "uart_tx_ao_a", "uart_rx_ao_a"; + function = "uart_ao"; + }; + }; + }; + uart_AO: serial@4c0 { compatible = "amlogic,meson-uart"; reg = <0x0 0x004c0 0x0 0x14>; @@ -173,6 +197,23 @@ #address-cells = <2>; #size-cells = <2>; ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>; + + pinctrl_periphs: pinctrl@4b0 { + compatible = "amlogic,meson-gxbb-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@4b0 { + reg = <0x0 0x004b0 0x0 0x28>, + <0x0 0x004e8 0x0 0x14>, + <0x0 0x00120 0x0 0x14>, + <0x0 0x00430 0x0 0x40>; + reg-names = "mux", "pull", "pull-enable", "gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + }; }; hiubus: hiubus@c883c000 { |