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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-20 18:21:32 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-20 18:21:32 -0800 |
commit | 62c79bb3a99fb46a8624f9c7e86fa5ee2f936360 (patch) | |
tree | a023f8c74efc1488e48a7252d97773f30acb58ee /arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | |
parent | 6d1c244803f2c013fb9c31b0904c01f1830b73ab (diff) | |
parent | d07822a7ed2484908fb0d86f5f1dec27db0da439 (diff) | |
download | linux-62c79bb3a99fb46a8624f9c7e86fa5ee2f936360.tar.bz2 |
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Olof Johansson:
"This is the first release where we split up the 64-bit contributions a
bit more, and in particular we are having a separate DT branch for
them.
Contents:
- New devices added to Broadcom NorthStar2
- Misc fixes for Exynos7 boards
- QCOM updates for MSM8916
- Rockchip tweaks for rk3368 SoC and eval board
- A series of fixes for APM X-Gene v1 and v2
- Renesas R8A7795 CPU/PSCI additions
- Marvell Berlin4CT PSCI, cpuidle, watchdog portions
- Freescale LS1043a SoC and dev board support
+ some treewide or other misc changes"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (104 commits)
dts/ls2080a: Update DTSI to add support of SP805 WDT
Documentation: DT: Add entry for ARM SP805-WDT
arm64: dts: X-Gene v2: I2C1 clock is always on
arm64: dts: X-Gene v1: I2C0 clock is always on
arm64: dts: Fix to use standard DT node names for X-Gene 1 and X-Gene 2 platforms
arm64: dts: hikey: add label properties to UARTs
arm64: dts: apq8016-sbc: add label properties for UART, I2C, and SPI
arm64: dts: apq8016-sbc: enable UART0 on LS connector
arm64: dts: juno: Add idle-states to device tree
arm64: dts: Added syscon-reboot node for FSL's LS2080A SoC
arm64: dts: add LS1043a-RDB board support
arm64: dts: add Freescale LS1043a SoC support
Documentation: DT: Add entry for Freescale LS1043a-RDB board
arm64: dts: uniphier: add PH1-LD10 SoC/board support
arm64: renesas: r8a7795: fix SATA clock assignment
arm64: dts: salvator-x: Enable SATA controller
arm64: dts: r8a7795: Add SATA controller node
arm64: renesas: r8a7795: add internal delay for i2c IPs
arm64: renesas: salvator-x: Add board part number to DT bindings
arm64: dts: r8a7795: Add pmu device nodes
...
Diffstat (limited to 'arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 6b8abbe68746..db17c5d5689c 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -20,6 +20,10 @@ aliases { serial0 = &blsp1_uart2; serial1 = &blsp1_uart1; + usid0 = &pm8916_0; + i2c0 = &blsp_i2c2; + i2c1 = &blsp_i2c6; + i2c3 = &blsp_i2c4; }; chosen { @@ -27,7 +31,16 @@ }; soc { + serial@78af000 { + label = "LS-UART0"; + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_uart1_default>; + pinctrl-1 = <&blsp1_uart1_sleep>; + }; + serial@78b0000 { + label = "LS-UART1"; status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&blsp1_uart2_default>; @@ -36,26 +49,31 @@ i2c@78b6000 { /* On Low speed expansion */ + label = "LS-I2C0"; status = "okay"; }; i2c@78b8000 { /* On High speed expansion */ + label = "HS-I2C2"; status = "okay"; }; i2c@78ba000 { /* On Low speed expansion */ + label = "LS-I2C1"; status = "okay"; }; spi@78b7000 { /* On High speed expansion */ + label = "HS-SPI1"; status = "okay"; }; spi@78b9000 { /* On Low speed expansion */ + label = "LS-SPI0"; status = "okay"; }; |