diff options
| author | Pali Rohár <pali@kernel.org> | 2020-04-30 10:06:25 +0200 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@bootlin.com> | 2020-05-17 17:52:30 +0200 |
| commit | 1b5a2dd9e266d78d5fddd7e6b116e47ba9577b5e (patch) | |
| tree | 9b9ed16fd2648317803ac70a0c62bc9229ca13ed /arch/arm64/boot/dts/marvell | |
| parent | df749cdb015011e9ed8b60ebb84b4e76a9f35735 (diff) | |
| download | linux-1b5a2dd9e266d78d5fddd7e6b116e47ba9577b5e.tar.bz2 | |
arm64: dts: marvell: armada-37xx: Move PCIe max-link-speed property
Move the max-link-speed property of the PCIe node from board specific
device tree files to the generic armada-37xx.dtsi.
Armada 37xx supports only PCIe gen2 speed so max-link-speed property
should be in the generic armada-37xx.dtsi file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index 15c1cf5c5b69..4cc735899c5d 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -132,7 +132,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>; status = "okay"; - max-link-speed = <2>; reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; /* enabled by U-Boot if PCIe module is present */ diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 5aaad64a793d..2bbc69b4dc99 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -493,6 +493,7 @@ <0 0 0 2 &pcie_intc 1>, <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; + max-link-speed = <2>; phys = <&comphy1 0>; pcie_intc: interrupt-controller { interrupt-controller; |