diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2017-12-13 08:10:31 -0600 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2018-01-23 09:37:14 -0600 |
| commit | 33af8ca0fd09514aa6a5600ae2aa455a30de5f43 (patch) | |
| tree | d386e8074c1df52a5c8ed45dea416ae9256bfcd0 /arch/arm64/boot/dts/altera | |
| parent | 15a9b85d4bfab0d24745f5424bd0a159066bc46f (diff) | |
| download | linux-33af8ca0fd09514aa6a5600ae2aa455a30de5f43.tar.bz2 | |
arm64: dts: stratix10: add USB ECC reset bit
The USB IP on the Stratix10 SoC needs the USB OCP(ecc) bit to get de-asserted
as well for the USB IP to work properly.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/altera')
| -rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 7c9bdc7ab50b..3c91d07ab47e 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -335,8 +335,8 @@ interrupts = <0 93 4>; phys = <&usbphy0>; phy-names = "usb2-phy"; - resets = <&rst USB0_RESET>; - reset-names = "dwc2"; + resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; + reset-names = "dwc2", "dwc2-ecc"; status = "disabled"; }; @@ -346,8 +346,8 @@ interrupts = <0 94 4>; phys = <&usbphy0>; phy-names = "usb2-phy"; - resets = <&rst USB1_RESET>; - reset-names = "dwc2"; + resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>; + reset-names = "dwc2", "dwc2-ecc"; status = "disabled"; }; |