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| author | Jason Cooper <jason@lakedaemon.net> | 2013-03-30 21:13:03 +0000 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2013-03-30 21:13:03 +0000 |
| commit | 02ac5b3fc5550e57b19a594e83efbb6af7bfa4fd (patch) | |
| tree | aa2ac3009be1ca895dc0b7ece2096ba965375b1d /arch/arm/plat-orion | |
| parent | 8d007488731981e921346a46997dfe9f08cb8201 (diff) | |
| parent | 3e762c86b337f6990cdbd71890921b4dd9351ed9 (diff) | |
| download | linux-02ac5b3fc5550e57b19a594e83efbb6af7bfa4fd.tar.bz2 | |
Merge tag 'tags/cleanup_for_v3.10' into mvebu/soc
mvebu cleanup for v3.10
- plat-orion: prep for mvebu-mbus driver
Diffstat (limited to 'arch/arm/plat-orion')
| -rw-r--r-- | arch/arm/plat-orion/Makefile | 6 | ||||
| -rw-r--r-- | arch/arm/plat-orion/pcie.c | 10 |
2 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index a82cecb84948..ad97400ba3ad 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile @@ -3,7 +3,11 @@ # ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -obj-y += addr-map.o +obj-$(CONFIG_ARCH_MVEBU) += addr-map.o +obj-$(CONFIG_ARCH_KIRKWOOD) += addr-map.o +obj-$(CONFIG_ARCH_DOVE) += addr-map.o +obj-$(CONFIG_ARCH_ORION5X) += addr-map.o +obj-$(CONFIG_ARCH_MV78XX0) += addr-map.o orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o obj-$(CONFIG_PLAT_ORION_LEGACY) += irq.o pcie.o time.o common.o mpp.o diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index f20a321088a2..8b8c06d2e9c4 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -120,12 +120,14 @@ void __init orion_pcie_reset(void __iomem *base) * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks * WIN[0-3] -> DRAM bank[0-3] */ -static void __init orion_pcie_setup_wins(void __iomem *base, - struct mbus_dram_target_info *dram) +static void __init orion_pcie_setup_wins(void __iomem *base) { + const struct mbus_dram_target_info *dram; u32 size; int i; + dram = mv_mbus_dram_info(); + /* * First, disable and clear BARs and windows. */ @@ -150,7 +152,7 @@ static void __init orion_pcie_setup_wins(void __iomem *base, */ size = 0; for (i = 0; i < dram->num_cs; i++) { - struct mbus_dram_window *cs = dram->cs + i; + const struct mbus_dram_window *cs = dram->cs + i; writel(cs->base & 0xffff0000, base + PCIE_WIN04_BASE_OFF(i)); writel(0, base + PCIE_WIN04_REMAP_OFF(i)); @@ -184,7 +186,7 @@ void __init orion_pcie_setup(void __iomem *base) /* * Point PCIe unit MBUS decode windows to DRAM space. */ - orion_pcie_setup_wins(base, &orion_mbus_dram_info); + orion_pcie_setup_wins(base); /* * Master + slave enable. |