diff options
author | Jens Axboe <jens.axboe@oracle.com> | 2009-12-03 13:49:39 +0100 |
---|---|---|
committer | Jens Axboe <jens.axboe@oracle.com> | 2009-12-03 13:49:39 +0100 |
commit | 220d0b1dbf78c6417a658c96e571415552d3abac (patch) | |
tree | 70cd3862540c38ea490e7a27c3c7acc35b680234 /arch/arm/plat-omap/dma.c | |
parent | 474b18ccc264c472abeec50f48469b6477202699 (diff) | |
parent | 22763c5cf3690a681551162c15d34d935308c8d7 (diff) | |
download | linux-220d0b1dbf78c6417a658c96e571415552d3abac.tar.bz2 |
Merge branch 'master' into for-2.6.33
Diffstat (limited to 'arch/arm/plat-omap/dma.c')
-rw-r--r-- | arch/arm/plat-omap/dma.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index b53125f41293..68eaae324b6a 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -691,13 +691,16 @@ static inline void disable_lnk(int lch) static inline void omap2_enable_irq_lch(int lch) { u32 val; + unsigned long flags; if (!cpu_class_is_omap2()) return; + spin_lock_irqsave(&dma_chan_lock, flags); val = dma_read(IRQENABLE_L0); val |= 1 << lch; dma_write(val, IRQENABLE_L0); + spin_unlock_irqrestore(&dma_chan_lock, flags); } int omap_request_dma(int dev_id, const char *dev_name, @@ -799,10 +802,13 @@ void omap_free_dma(int lch) if (cpu_class_is_omap2()) { u32 val; + + spin_lock_irqsave(&dma_chan_lock, flags); /* Disable interrupts */ val = dma_read(IRQENABLE_L0); val &= ~(1 << lch); dma_write(val, IRQENABLE_L0); + spin_unlock_irqrestore(&dma_chan_lock, flags); /* Clear the CSR register and IRQ status register */ dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch)); @@ -1108,6 +1114,14 @@ int omap_dma_running(void) { int lch; + /* + * On OMAP1510, internal LCD controller will start the transfer + * when it gets enabled, so assume DMA running if LCD enabled. + */ + if (cpu_is_omap1510()) + if (omap_readw(0xfffec000 + 0x00) & (1 << 0)) + return 1; + /* Check if LCD DMA is running */ if (cpu_is_omap16xx()) if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN) |