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authorMarc Zyngier <marc.zyngier@arm.com>2011-11-02 17:30:49 +0000
committerShawn Guo <shawn.guo@linaro.org>2011-11-04 03:52:49 +0800
commita918feef334090692ea65e77a8b0cca5e682e666 (patch)
tree6db2e7cc24954d2e2fbc3abf9a066eeb6374f18c /arch/arm/plat-mxc
parent70c9f18ca8f3652c7dcf715e9f0d41c399fe130d (diff)
downloadlinux-a918feef334090692ea65e77a8b0cca5e682e666.tar.bz2
ARM: mxc: fix local timer interrupt handling
As local timer interrupts are now handled as normal interrupts, remove the special case in the GIC handler. Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/gic.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
index b3b8eed263b8..12f8f8109010 100644
--- a/arch/arm/plat-mxc/gic.c
+++ b/arch/arm/plat-mxc/gic.c
@@ -28,21 +28,14 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
if (irqnr == 1023)
break;
- if (irqnr > 29 && irqnr < 1021)
+ if (irqnr > 15 && irqnr < 1021)
handle_IRQ(irqnr, regs);
#ifdef CONFIG_SMP
- else if (irqnr < 16) {
+ else {
writel_relaxed(irqstat, gic_cpu_base_addr +
GIC_CPU_EOI);
handle_IPI(irqnr, regs);
}
#endif
-#ifdef CONFIG_LOCAL_TIMERS
- else if (irqnr == 29) {
- writel_relaxed(irqstat, gic_cpu_base_addr +
- GIC_CPU_EOI);
- handle_local_timer(regs);
- }
-#endif
} while (1);
}