diff options
| author | Jens Axboe <axboe@kernel.dk> | 2018-12-09 17:45:40 -0700 |
|---|---|---|
| committer | Jens Axboe <axboe@kernel.dk> | 2018-12-09 17:45:40 -0700 |
| commit | 96f774106ed48808a5e314741e3414c617d14460 (patch) | |
| tree | a0beee162eeaf4813495ee28d3cfdd06effbc8be /arch/arm/mm/cache-v7m.S | |
| parent | 58ab5e32e6fd83e33943614e7257f2ac5823824a (diff) | |
| parent | 40e020c129cfc991e8ab4736d2665351ffd1468d (diff) | |
| download | linux-96f774106ed48808a5e314741e3414c617d14460.tar.bz2 | |
Merge tag 'v4.20-rc6' into for-4.21/block
Pull in v4.20-rc6 to resolve the conflict in NVMe, but also to get the
two corruption fixes. We're going to be overhauling the direct dispatch
path, and we need to do that on top of the changes we made for that
in mainline.
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Diffstat (limited to 'arch/arm/mm/cache-v7m.S')
| -rw-r--r-- | arch/arm/mm/cache-v7m.S | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm/mm/cache-v7m.S b/arch/arm/mm/cache-v7m.S index 788486e830d3..32aa2a2aa260 100644 --- a/arch/arm/mm/cache-v7m.S +++ b/arch/arm/mm/cache-v7m.S @@ -73,9 +73,11 @@ /* * dcimvac: Invalidate data cache line by MVA to PoC */ -.macro dcimvac, rt, tmp - v7m_cacheop \rt, \tmp, V7M_SCB_DCIMVAC +.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo +.macro dcimvac\c, rt, tmp + v7m_cacheop \rt, \tmp, V7M_SCB_DCIMVAC, \c .endm +.endr /* * dccmvau: Clean data cache line by MVA to PoU @@ -369,14 +371,16 @@ v7m_dma_inv_range: tst r0, r3 bic r0, r0, r3 dccimvacne r0, r3 + addne r0, r0, r2 subne r3, r2, #1 @ restore r3, corrupted by v7m's dccimvac tst r1, r3 bic r1, r1, r3 dccimvacne r1, r3 -1: - dcimvac r0, r3 - add r0, r0, r2 cmp r0, r1 +1: + dcimvaclo r0, r3 + addlo r0, r0, r2 + cmplo r0, r1 blo 1b dsb st ret lr |