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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2021-01-18 10:40:00 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-01-22 12:41:07 -0600 |
| commit | fea4b41022f35a017d7221d23c6d9bee84ad90d0 (patch) | |
| tree | 455a2173a89b7a5340b2596f987ea6072cfc96ef /arch/arm/mm/cache-v7m.S | |
| parent | 0e43e08c13a1b77b2274a2122d3f51dfe00cda09 (diff) | |
| download | linux-fea4b41022f35a017d7221d23c6d9bee84ad90d0.tar.bz2 | |
ARM: dts: qcom: sdx55: Add USB3 and PHY support
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on SDX55.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-3-manivannan.sadhasivam@linaro.org
[bjorn: Added missing #power-domain-cells to &gcc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm/mm/cache-v7m.S')
0 files changed, 0 insertions, 0 deletions