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| author | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2014-09-02 14:19:09 -0700 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2014-09-16 12:55:07 +0200 |
| commit | 0beb2bd36f6216f455363f47f8ba32fdf26667fb (patch) | |
| tree | fb371f2b3d8c5e23b81cd714d697042227c3dc6b /arch/arm/mach-ux500 | |
| parent | 36ad5ae6dea7ae6abbb7bdf25078e7d1dabcecad (diff) | |
| download | linux-0beb2bd36f6216f455363f47f8ba32fdf26667fb.tar.bz2 | |
ARM: zynq: PM: Enable DDR clock stop
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-ux500')
0 files changed, 0 insertions, 0 deletions