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authorDmitry Osipenko <digetx@gmail.com>2019-07-30 20:23:40 +0300
committerThierry Reding <treding@nvidia.com>2019-10-29 14:32:01 +0100
commit91d7ff5aa7e3edd9ab99a424099476ed5667b152 (patch)
tree2998c7783986f45ffcf8f1d9b6912220d5c74053 /arch/arm/mach-tegra
parentd70f7d31a9e2088e8a507194354d41ea10062994 (diff)
downloadlinux-91d7ff5aa7e3edd9ab99a424099476ed5667b152.tar.bz2
ARM: tegra: Use WFE for power-gating on Tegra30
Turned out that WFI doesn't work reliably on Tegra30 as a trigger for the power-gating, it causes CPU hang under some circumstances like having memory controller running of PLLP. The TRM doc states that WFI should be used for the Big-Little "Cluster Switch", while WFE for the power-gating. Hence let's use the WFE for CPU0 power-gating, like it is done for the power-gating of a secondary cores. This fixes CPU hang after entering LP2 with memory running off PLLP. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/sleep-tegra30.S4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index b408fa56eb89..3341a12bbb9c 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -682,10 +682,12 @@ tegra30_enter_sleep:
dsb
ldr r0, [r6, r2] /* memory barrier */
+ cmp r10, #TEGRA30
halted:
isb
dsb
- wfi /* CPU should be power gated here */
+ wfine /* CPU should be power gated here */
+ wfeeq
/* !!!FIXME!!! Implement halt failure handler */
b halted