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| author | Joseph Lo <josephl@nvidia.com> | 2013-07-03 17:50:40 +0800 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-07-19 10:08:06 -0600 |
| commit | ccea4bc654a9d5330c4488acadc3abfa4ea7ebbf (patch) | |
| tree | af6af4a789343de0b69fdd3a7cf05e7257a54728 /arch/arm/mach-tegra/sleep-tegra30.S | |
| parent | 2f5aaa3d2703256d37ae75818c495783d4ad0543 (diff) | |
| download | linux-ccea4bc654a9d5330c4488acadc3abfa4ea7ebbf.tar.bz2 | |
ARM: tegra: add low level code for Tegra114 cluster power down
When the CPU cluster power down, the vGIC is powered down too. The
flow controller needs to monitor the legacy interrupt controller to
wake up CPU. So setting up the appropriate wake up event in flow
controller.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-tegra30.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-tegra30.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 6744161475b2..ecad4eace941 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -175,8 +175,12 @@ tegra30_enter_sleep: orr r0, r0, #FLOW_CTRL_CSR_ENABLE str r0, [r6, r2] + tegra_get_soc_id TEGRA_APB_MISC_BASE, r10 + cmp r10, #TEGRA30 mov r0, #FLOW_CTRL_WAIT_FOR_INTERRUPT - orr r0, r0, #FLOW_CTRL_HALT_CPU_IRQ | FLOW_CTRL_HALT_CPU_FIQ + orreq r0, r0, #FLOW_CTRL_HALT_CPU_IRQ | FLOW_CTRL_HALT_CPU_FIQ + orrne r0, r0, #FLOW_CTRL_HALT_LIC_IRQ | FLOW_CTRL_HALT_LIC_FIQ + cpu_to_halt_reg r2, r1 str r0, [r6, r2] dsb |