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| author | Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> | 2019-05-29 19:05:00 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2019-05-31 11:38:01 +0200 |
| commit | 51a0daf64dee78dacaecc7bec3d36e0b2f49c7a1 (patch) | |
| tree | 943770cd24632375da24fe8bc9ef2c5d702a2a02 /arch/arm/mach-shmobile | |
| parent | a188339ca5a396acc588e5851ed7e19f66b0ebd9 (diff) | |
| download | linux-51a0daf64dee78dacaecc7bec3d36e0b2f49c7a1.tar.bz2 | |
ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
If PSCI is available then most likely we are running on PSCI-enabled
U-Boot which, we assume, has already taken care of resetting CNTVOFF
and updating counter module before switching to non-secure mode
and we don't need to.
As the psci_smp_available() helper always returns false if CONFIG_SMP
is disabled, it can't be used safely as an indicator of PSCI usage.
For that reason, we check for the mandatory PSCI operation to be
available.
Please note, an extra check to prevent secure_cntvoff_init() from
being called for secondary CPUs in headsmp-apmu.S is not needed,
as SMP code for APMU based system is not executed if PSCI is in use.
Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile')
| -rw-r--r-- | arch/arm/mach-shmobile/setup-rcar-gen2.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index eea60b20c6b4..9e4bc1865f84 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -17,6 +17,7 @@ #include <linux/of.h> #include <linux/of_fdt.h> #include <linux/of_platform.h> +#include <linux/psci.h> #include <asm/mach/arch.h> #include <asm/secure_cntvoff.h> #include "common.h" @@ -60,9 +61,24 @@ static unsigned int __init get_extal_freq(void) void __init rcar_gen2_timer_init(void) { + bool need_update = true; void __iomem *base; u32 freq; + /* + * If PSCI is available then most likely we are running on PSCI-enabled + * U-Boot which, we assume, has already taken care of resetting CNTVOFF + * and updating counter module before switching to non-secure mode + * and we don't need to. + */ +#ifdef CONFIG_ARM_PSCI_FW + if (psci_ops.cpu_on) + need_update = false; +#endif + + if (need_update == false) + goto skip_update; + secure_cntvoff_init(); if (of_machine_is_compatible("renesas,r8a7745") || @@ -102,6 +118,7 @@ void __init rcar_gen2_timer_init(void) iounmap(base); +skip_update: of_clk_init(NULL); timer_probe(); } |