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| author | Arnd Bergmann <arnd@arndb.de> | 2012-11-12 21:45:19 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-11-12 21:45:19 +0100 |
| commit | 1bf0bc1e050fc425cc776b10d3ce8754389aabbe (patch) | |
| tree | 317dceabcdd661bebfb829c4ba4440dc2ae2adf2 /arch/arm/mach-shmobile/clock-r8a7779.c | |
| parent | b68c50d836517cf662145b2e7d5cdf40a38b24f1 (diff) | |
| parent | 2944628607f76e4755660cd710f22a4748ef88d8 (diff) | |
| download | linux-1bf0bc1e050fc425cc776b10d3ce8754389aabbe.tar.bz2 | |
Merge branch 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman <horms@verge.net.au>:
This series is based on the renesas/soc branch of the arm-soc tree.
There will be a subquent 'SoC2' pull request which is based on this
pull-request and a pull-request for boards.
* 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: add fsi external clock sh7372
ARM: shmobile: add fsi external clock on r8a7740
ARM: shmobile: r8a7740: add FSI-DVI clocks
ARM: shmobile: sh7372: use sh_clk_fsidiv_register() for FSI-DIV clocks
ARM: shmobile: sh7372: sh7372_fsidivX_clk become non-global
sh: clkfwk: add sh_clk_fsidiv_register()
ARM: shmobile: r8a7779: add USB OHCI clock support
ARM: shmobile: r8a7779: add USB EHCI clock support
ARM: shmobile: r8a7740: add USB24 clock explain
ARM: shmobile: r8a7779: PFC rename PENCx -> USB_PENCx
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a7779.c')
| -rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7779.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index e48509b938cf..c019609da660 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -87,6 +87,7 @@ static struct clk div4_clks[DIV4_NR] = { }; enum { MSTP323, MSTP322, MSTP321, MSTP320, + MSTP101, MSTP100, MSTP030, MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, MSTP016, MSTP015, MSTP014, @@ -98,6 +99,8 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */ [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ + [MSTP101] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 1, 0), /* USB2 */ + [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), /* USB0/1 */ [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */ [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0), /* I2C1 */ [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0), /* I2C2 */ @@ -153,6 +156,10 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), /* MSTP32 clocks */ + CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */ + CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */ + CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ + CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */ CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ |