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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-03-10 12:49:16 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-05-13 17:12:17 +0100
commitc23bfc3835173f5229b2503e3b616001a28affad (patch)
tree109f74ea29224587bead91289f55f2d30032b615 /arch/arm/mach-sa1100
parentdaeb4c0c3bf2df72d0cd6e4330bad9e2e520552b (diff)
downloadlinux-c23bfc3835173f5229b2503e3b616001a28affad.tar.bz2
ARM: PCI: provide a default bus scan implementation
Most PCI implementations perform simple root bus scanning. Rather than having each group of platforms provide a duplicated bus scan function, provide the PCI configuration ops structure via the hw_pci structure, and call the root bus scanning function from core ARM PCI code. Acked-by: Krzysztof HaƂasa <khc@pm.waw.pl> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/pci-nanoengine.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index b49108b890a8..ff02e2da99f2 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -129,12 +129,6 @@ static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
return NANOENGINE_IRQ_GPIO_PCI;
}
-struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys)
-{
- return pci_scan_root_bus(NULL, sys->busnr, &pci_nano_ops, sys,
- &sys->resources);
-}
-
static struct resource pci_io_ports =
DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
@@ -274,7 +268,7 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
static struct hw_pci nanoengine_pci __initdata = {
.map_irq = pci_nanoengine_map_irq,
.nr_controllers = 1,
- .scan = pci_nanoengine_scan_bus,
+ .ops = &pci_nano_ops,
.setup = pci_nanoengine_setup,
};